High-voltage CMOS transistors on a standard CMOS wafer

Details High-voltage CMOS transistors on a standard CMOS wafer High-voltage CMOS transistors on a standard CMOS wafer

1995-04-26

1996-11-26

Wojciechowicz, Edward

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257375, 257376, 257408, 437 27, 437 40, 437 56, 437 62, 437228, H01L 2976, H01L 21265

Patent

active

055788556

ABSTRACT:
A low-voltage 0.8-micron CMOS process is modified by implanting arsenic or phosphorus during epitaxy in a p-type substrate starting material to increase the depth of selected n-well areas for the purpose of producing high-voltage transistors on the same substrate in the same CMOS process. Implanting boron in a p-field extension area in a manner which minimizes the dopant in the adjacent field oxide achieves a similar result. That is, breakdown and punch-through voltages are increased. Together, these make CMOS transistors which operate at a higher voltage range than either innovation alone.

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Gilles Thomas et al. "High-Voltage Technology Offers New Solutions for Interface Integrated Circuits," IEEE Transactions on Electron Devices, vol. ED-33, No. 12 (Dec. 1986) pp. 2016-2024.
Modeling and Characterization of CMOS-Compatible High-Voltage Device Structures by Zahir Parpia, C. Andre T. Salama & Robert A. Hadaway; pp. 2335-2343; IEEE Transactions on Electron Devices, vol. ED-34, No. 11, Nov., 1987.

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