High voltage CMOS logic circuit using low voltage transistors

Details High voltage CMOS logic circuit using low voltage transistors High voltage CMOS logic circuit using low voltage transistors

1997-12-05

1999-10-05

Tokar, Michael

Electronic digital logic circuitry

Interface

Logic level shifting

326 81, 326 83, H03K 190175, H03K 19094

Patent

active

059630540

ABSTRACT:
A logic gate arrangement for switching voltages greater than the gate breakdown voltage of the transistors in the gate. Two transistors of different conductivity types, are disposed between the N and P transistors which perform the logic function of a conventional CMOS gate. The gates of the two transistors are connected to a first voltage that is less than the breakdown voltage of the transistors, with the entire logic gate being supplied with a voltage that is greater than the first voltage. Three outputs are provided, two with limited voltage swings that drive other like gates or conventional CMOS gates and the other output having a full voltage swing. Logic gates implementing various logic functions, such as NAND and NOR, are disclosed. Further, a cross-coupled logic gate is disclosed which can operate as a latch or as a logic voltage translator circuit.

REFERENCES:
patent: 5465054 (1995-11-01), Erhart
patent: 5539334 (1996-07-01), Clapp, III et al.
patent: 5604449 (1997-02-01), Erhart et al.
patent: 5821800 (1998-10-01), Le et al.

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