High voltage CMOS device to integrate low voltage controlling de

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257373, 257395, 257506, 257545, 437 34, 437 40, 437 63, 437 74, 437913, H01L 2702, H01L 21265

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053828208

ABSTRACT:
A method of fabrication of an semiconductor device comprises applying an impurity of a predetermined polarity to a silicon substrate; forming a well by applying an impurity of an opposite polarity to a region in the silicon substrate; forming a first masking layer on the surface of the substrate; providing openings in the masking layer and implanting dopant ions of a first polarity into the surface of the substrate in a set of first regions selected in the substrate and the well forming a second masking layer on the surface of the substrate; implanting dopant ions of a second polarity through a second mask in other regions selected in the well and the substrate; removal of the second masking layer; formation of field oxide structures over the first and second regions; forming gate oxide layers above the exposed portions of the first and second central regions; and formation of conductive gate structures over the gate oxide layers.

REFERENCES:
patent: 5008722 (1991-04-01), Esquivel
patent: 5128739 (1992-07-01), Shirato
Z. Parpia et al, "A Novel CMOS Compatible High Voltage Transistor Structure" IEEE Trans Electron Devices, vol. ED-33, pp. 1948-1952 (Dec. 1986) (reprint pp. 116-120).
R. Jayaraman et al, "Comparison of High Voltage Devices for Power Integrated Circuits," pp. IEDM 84 258-261 (1984).

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