Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral adapting
Reexamination Certificate
1999-05-28
2002-04-30
Lee, Thomas (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral adapting
C710S052000, C710S120000
Reexamination Certificate
active
06381661
ABSTRACT:
BACKGROUND OF THE INVENTION
1. The Field of the Invention
The present invention relates to the field of modem communications between a host computer, and an attached modem, across networks. More specifically the invention relates to a high throughput interface between a modem's Digital Signal Processor (DSP) and a computer's internal Universal Asynchronous Receiver Transmitter (UART) interface.
2. The Relevant Technology
The demands of recent software and hardware enhancements upon computer communication technology require changes to the standard hardware configuration. One computer component device that traditionally lags behind other computer system enhancements is the serial port modem interface on the personal computer. The first modems were in an external box linked to the computer via a serial cable connection. The external modem converted the serial information into analog modules for transmission across the phone lines. In this configuration, there was generally some type of UART inside of the serial port on the computer and the serial port of the modem. The computer UART would take parallel information, serialize it, and then send it across the serial cable. The modem UART would then translate information so that the modem could modulate the information for transmission. In the case of modern internal modems and PCMCIA modems, serial connection cables are not utilized, creating faster modem communication. Unfortunately, a substantial amount of legacy software expects the original UART configuration to convert the parallel data into serial data strands. This unnecessary hardware device is often blamed as the bottleneck for data transfers and the source of poor computer response. Typically, the computer user will notice substantial lag time from the computer's central processing unit (CPU) whenever the CPU attempts to service interrupt requests involving large data transfer operations with the UART. On the other side of the local communications link, the DSP of the modern modem is also severely overburdened. Servicing multiple interrupts from the UART can drastically affect the performance and effectiveness of the DSP.
Today, the minimum serial port interface device that any modem modem should use is a 16550 UART. Lower speed devices like the 8250 UART and 16450 UART cannot operate at the speeds dictated by modem modem standards without risking data overrun errors. An overrun error occurs when a new character is received before the old character has been fetched by the computer. Once this occurs the old character is lost and unavailable for processing by the personal computer.
The original UART chip shipped with the IBM® personal computer was the 8250 UART. The 8250 UART chip was limited to a maximum data transfer rate of 9600 bits per second (bps). This chip was later replaced with the 16540 UART chip which had the same architecture as the 8250 UART; but a higher maximum bps specification. Both of these chips only had a one byte buffer. Since each character is designated by eight bits, the buffer on the 8250 UART and 16540 UART corresponded to one character. Under the DOS platform, the one byte buffer of the 8250 and 16540 UARTs provided satisfactory performance for the communication ports operating at speeds of lower than 9600 bps.
Computer designers developed the UART chips to function at 9600 bps because this speed corresponded with the performance requirements found in the underlying Microsoft® specification for the DOS systems shipped with the original IBM personal computers. A closer look at the Microsoft DOS timing specifications reveals that an interrupt was not to be disabled for more than one millisecond at a time. While an interrupt is disabled the CPU will not process send/receive requests with the communications port. Because a 9600 bps modem will deliver a character approximately every millisecond, the one byte buffer on the UART chips was sufficient to prevent data over-run errors.
This changed under the new multi-tasking Windows 3.1 operating system. There is no longer an imposed restriction on the interrupt response control as previously existed under the DOS timing specification. As a result, interrupts could be ignored longer and repeated interrupts could be handled faster. To prevent over-run errors, the 16540 UART architecture was limited to operating between 1200 and 2400 bps under the Windows operating system. This was unsatisfactory because the new modems were capable of much higher transfer rates. A serial communications port needed to operate at transfer rates of at least 38,400 bps to keep up with the faster modems. But once data transfer rates climb above 9600 bps, then the device can receive a new character before the old one has been fetched by the interrupt service routine.
When the older 8250 and 16540 UART devices were forced to perform at higher speeds, their one character buffers guaranteed over-run errors. To fix this problem, the 16550 UART was developed. It had a 16 byte buffer and was able to operate under the high demand of the new multi-tasking Windows 3.1 system. Modem modems are moving even faster with some operating at 115,200 bps. Thus, a system of buffering is required to prevent over-run errors. For example, a 16 byte buffer may not sound like a huge improvement over the 1 byte buffer, but this allows 16 characters to be received before the computer needs to service the UART data interrupt thereby increasing the maximum data transfer rate that the computer can process reliably, without risk of an over-run error, from 9600 to 153,000 bps if the processor employs a one millisecond interrupt dead time. Obviously, a 32 byte buffer, as found in the 16650 UART, increases the maximum datatransfer rate to over 300,000 bps. Unfortunately, the DOS specification which required a one millisecond maximum interrupt dead time is ignored by Windows 3.1. This means that the dead times become so severe that even speeds of 2400 bps will often result in lost characters and over-runs if using a slower processor.
A secondary benefit to increasing the buffer size over the original 1 byte is that the computer only needs to service the interrupt about 8%-12% of the time. This allows the CPU time for updating the screen or doing other computational chores, thus the computer appears more responsive. But, as the computers get faster, even the 16 and 32 byte standards are becoming ineffective and inefficient
Traditionally, the DSP would send an interrupt signal to the UART that would then be passed on to the personal computer telling the computer that data was waiting for it to pick up. Due to the slow transfer rate, the computer could function normally since it could easily handle the interrupt and return to performing its previous program function without any noticeable delay to the user. With new high speed data transfers, the modem DSP is continually waiting for the computer to send or receive more data creating more interrupts and therefore interfering with the overall performance of the personal computer. Thus the interrupt service time of the DSP to UART interface remains a critical feature to the overall performance of the computer. Also the dramatic increase in a modem's transmission capability has created a unique problem for modems, because they must be able to increase the throughput to the computer data bus while maintaining the standard serial protocols associated with UART devices.
Unfortunately, this type of serial connection creates a tremendous overhead burden on the DSP and internal CPU handling the Input/Output Interface. The UART is forced to make several requests for character echo, parity strip, and parity add functions each requiring the DSP to virtually stop work on other projects while the data request is being transferred. What is needed is an intermediate device which can handle the simple flow control functions without hands on supervision by the DSP. More specifically, what is needed is a simple yet reliable hardware solution integrated into the modem which allows for connectivity between the DSP and
Arnesen David
Killian Harrison
Messerly Shayne
3Com Corporation
Du Thuan
Lee Thomas
Workman & Nydegger & Seeley
LandOfFree
High throughput UART to DSP interface having Dual transmit... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High throughput UART to DSP interface having Dual transmit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High throughput UART to DSP interface having Dual transmit... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2869564