Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of...
Reexamination Certificate
2007-06-19
2007-06-19
Le, Thao P. (Department: 2818)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
C438S781000, C438S465000, C438S496000
Reexamination Certificate
active
10908230
ABSTRACT:
A process which uses a silicone resin to form a wafer-to-carrier bonded package that enables wafer thinning and backside processing while the cured resin exhibits high chemical and thermal resistance. The process is versatile in that the constructed wafer package allows for a wide range of chemical exposures to include dilute acid and base etchants, resist and residue strippers, electroplating chemistries, and also providing use in a range of deposition and etch processes that may exceed 300° C. The process utilizes a mixture of silicone monomers that when applied to semiconductor wafers by a spin-coat application, the result is a planarization of the front side device area, and when a subsequent thin coat is applied will facilitate bonding of the wafer-to-carrier package when heat and pressure are applied. The cured silicone bonded wafer-to-carrier package allows for wafer thinning consistent to industry objectives. Backside processing may include thermal oxide deposition, installed vias, and subsequent metallization in plating baths. Upon completion of a thinned and processed wafer, detachment occurs as described in prior art. Specialty chemical systems which completely dissolves the cured silicone and allows the wafer substrate to be easily rinsed and dried and become available for subsequent processing or final dicing and packaging.
REFERENCES:
patent: 5578380 (1996-11-01), Babu
patent: 6096483 (2000-08-01), Harkness et al.
patent: 6433057 (2002-08-01), Bhagwagar et al.
patent: 6649704 (2003-11-01), Brewer et al.
patent: 6713569 (2004-03-01), Chorvath et al.
patent: 6818608 (2004-11-01), Moore
patent: 2005/0064209 (2005-03-01), Haines et al.
patent: 2005/0070651 (2005-03-01), McNulty et al.
Tomanek, Andreas, Silicones & Industry: A Compendium for Practical Use, published by Wacker-Chemie GmbH, Munich, Germany, 1990 (p. 18).
Moore John C.
Smith Alexander C
General Chemical Performance Products LLC
Le Thao P.
Plantamura Arthur J.
LandOfFree
High temperature and chemical resistant process for wafer... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High temperature and chemical resistant process for wafer..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High temperature and chemical resistant process for wafer... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3842492