High-speed TDF testing on low cost testers using on-chip...

Details High-speed TDF testing on low cost testers using on-chip... High-speed TDF testing on low cost testers using on-chip...

2008-05-20

2008-05-20

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S291000, C324S076540

Reexamination Certificate

active

07375570

ABSTRACT:
A circuit which facilitates TDF testing without having to purchase expensive new test equipment, such as a new test platform that is capable of supporting test frequencies well beyond the current 200 MHz limitation. A solution to current TDF testing problems by adding circuitry to the device-under-test (DUT) that is configured to receive two reference clock signals from automated test equipment (ATE), i.e. conventional ATE which does not provide test frequencies beyond 200 Mhz, and create two high-speed clock pulses that serve as the launch and capture clocks for the TDF test sequence on the DUT.

REFERENCES:
patent: 5003194 (1991-03-01), Engelhard
patent: 5717352 (1998-02-01), Ebiya
patent: 6058057 (2000-05-01), Ochiai et al.
patent: 6060898 (2000-05-01), Arkin
patent: 6275057 (2001-08-01), Takizawa
patent: 6557128 (2003-04-01), Turnquist
patent: 7155651 (2006-12-01), Nadeau-Dostie et al.
patent: 7202656 (2007-04-01), Gearhardt et al.

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