High speed switching MOSFETS using multi-parallel die...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S341000, C257S342000, C257S343000, C257S723000, C257SE23079

Reexamination Certificate

active

10208275

ABSTRACT:
This invention discloses a method for configuring a power MOSFET package by packaging several paralleled and separated MOSFET chips in the assembly. The method further includes a step of connecting the gate pad on each of these MOSFET chips with a low-resistance gate bus. The package resistance and inductance are significantly reduced and switching speed and heat dissipation are substantially improved.

REFERENCES:
patent: 5459655 (1995-10-01), Mori et al.
patent: 6020636 (2000-02-01), Adishian
patent: 6593622 (2003-07-01), Kinzer et al.
patent: 6809348 (2004-10-01), Suzuki et al.

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