High speed super push-pull logic (SPL) circuit using bipolar tec

Details High speed super push-pull logic (SPL) circuit using bipolar tec High speed super push-pull logic (SPL) circuit using bipolar tec

1994-02-28

1996-02-27

Westin, Edward P.

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Bipolar transistor

326124, 327374, H03K 1920

Patent

active

054950996

ABSTRACT:
A PNP bipolar transistor is connected to both ends of a resistive element of a Super Push-Pull Logic (SPL) circuit so as to place an emitter thereof at the side of a power supply source. Resistive elements and an NPN bipolar transistor forms a bias circuit for biasing a low voltage to a base of the PNP bipolar transistor. The base of the PNP bipolar transistor is connected to an emitter node of a NPN bipolar transistor through a capacitative load element. By this construction, the present invention can provide signal without any delay to turn on the PNP bipolar transistor. Therefore, the collector response speed of the SPL circuit can be increased.

REFERENCES:
patent: 4508979 (1985-04-01), Togari
patent: 4737665 (1988-04-01), Ovens
patent: 5089724 (1992-02-01), Chuang et al.
patent: 5206546 (1993-04-01), Usami
patent: 5237214 (1993-08-01), Usami
patent: 5298802 (1994-03-01), Usami et al.
patent: 5334886 (1994-08-01), Chuang

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