High speed signal driving scheme

Electronic digital logic circuitry – Interface – Current driving

Patent

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Details

326 21, 327379, 327108, H03K 1716, H03K 17687, H03K 19003

Patent

active

053693159

ABSTRACT:
A high speed signal driving scheme is disclosed which reduces timing delays associated with a signal line precharged to a selected voltage by limiting the voltage transition on the signal line from its precharged voltage.

REFERENCES:
patent: 4763023 (1988-08-01), Spence
patent: 4983860 (1991-01-01), Yim et al.

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