Optical waveguides – With disengagable mechanical connector – Optical fiber to a nonfiber optical device connector
Reexamination Certificate
2002-09-10
2004-11-23
Healy, Brian (Department: 2874)
Optical waveguides
With disengagable mechanical connector
Optical fiber to a nonfiber optical device connector
C385S088000, C438S031000, C438S032000, C398S022000, C398S140000, C398S141000
Reexamination Certificate
active
06821029
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to serial communications between electronic components, and more particularly to a high-speed optical communications link.
2. Discussion of Related Art
As the bandwidth requirements of modern microprocessors and other electronic devices continue to increase, the need for a high-speed, low-noise communications technique becomes more and more important. In the near future, data transfer rates in excess of 40 Gb/s will be required to keep up with the faster CPU clock speeds. However, conventional data communications technologies have a limited bandwidth capability.
FIG. 1
a
shows a conventional printed circuit board (PCB)
100
a
, which comprises an integrated circuit (IC)
120
mounted on a board
110
(typically made from FR4). A copper trace
111
printed on board
110
routes signals to and from IC
120
. PCB
100
a
is installed in a socket
191
of a backplane
190
. Copper trace
111
interfaces with socket
191
, thereby allowing IC
120
to communicate with other ICs (not shown) mounted on other PCBs (not shown) connected to backplane
190
.
Copper traces on a board (such as an FR4 substrate) provide a well-known and well-characterized means for carrying data between ICs. Unfortunately, the data links provided by such traces are highly susceptible to signal degradation at higher bandwidths. Typically, a copper trace on an FR4 board can sustain at most a 2 GHz signal—anything greater results in excessive noise and signal attenuation. Increasing the number of traces to create a wider data path can provide some overall bandwidth improvement, but board area restrictions, EMI effects, and data synchronizing issues can reduce the effectiveness of this type of parallel bus structure.
To overcome these bandwidth limitations, an optical fiber can be used in place of copper traces. Because of the high bandwidth and low noise characteristics of optical fiber, the parallel data bus architecture formed by copper traces can be replaced by a serial architecture using an optical link.
FIG. 1
b
shows an electronics package
100
b
that includes an IC
120
mounted on a board
110
, similar to PCB
100
a
shown in
FIG. 1
a
. However, instead of copper traces, electronics package
100
b
includes a serializer/deserializer (SERDES)
130
connected to IC
120
via a flex interconnect
131
. SERDES
130
converts outgoing parallel data into serial form, and converts incoming serial data into parallel form. A combination vertical cavity surface emitting laser (VCSEL) and detector array
140
is connected to SERDES
130
via solder bumps
141
(flip-chip or ball-grid-array (BGA) connection). A connector
150
, attached to VCSEL/detector array
140
, mates an optical fiber
151
to VCSEL/detector array
140
, thereby providing an optical data link for high-speed communications.
However, while optical fiber
151
can carry data at well over 40 Gb/s, flex interconnect
131
creates a bottleneck for data flow to and from IC
120
. Although optimized for high-speed data transmission, typical flex interconnects (such as those manufactured by MicroConnex Corp. and Flex Interconnect Technologies) still cannot sustain a data rate of much greater than 10 Gb/s. Ideally, SERDES
130
and VCSEL/detector array
140
would be formed in the same die as IC
120
, thereby eliminating the need for flex interconnect
131
. However, performance requirements for the individual components generally preclude the formation of IC
120
, SERDES
130
, and VCSEL/detector array
140
using a single process. For example, IC
120
would typically be produced using a silicon CMOS process to make use of high-speed digital devices. However, SERDES
130
would generally be formed in a silicon germanium (SiGe) biCMOS process to meet the high-drive requirements of the SERDES devices. And finally, VCSEL/detector array
140
is typically produced by a gallium arsenide (GaAs) process, due to the direct bandgap that optimizes the process for optical applications. Thus, combining IC
120
, SERDES
130
, and VCSEL/detector array
140
into a single die using a single process would generally degrade the performance of one or more of those components, thereby eliminating any benefit achieved from elimination of the flex interconnect.
However, even with the transmission bottleneck caused by flex interconnect
131
, electronics package
100
b
still provides a significant increase in data bandwidth over conventional copper trace systems. Unfortunately, manufacturing electronics package
100
b
can be extremely expensive because each die (IC
120
, SERDES
130
, and VCSEL/detector array
140
) must be produced separately and then assembled into a single PCB. This type of “package-level” integration is generally much more costly than a “die-level” integration due to the manual assembly operations required. Particularly problematic is the flip-chip or BGA connection between SERDES
130
and VCSEL/detector array
140
. Although solder bumps
141
provide a fast electrical connection between SERDES
130
and VCSEL/detector array
140
, accurate alignment and secure attachment of the two dies can require high-precision packaging tooling, which in turn can significantly increase the final cost of electronics package
100
b.
Accordingly, it is desirable to provide an optical transceiver (transmitter/receiver) for an IC that provides high data bandwidth while at the same time minimizing package-level integration operations.
SUMMARY
The invention provides a high-speed optical transceiver for an IC by integrating optical transceiver components with the IC at the die level, thereby minimizing throughput degradation and simplifying the manufacturing process. According to an embodiment of the invention, a SERDES is attached to an IC using a covalent bonding technique. The covalent bond provides an accurate, high-bandwidth connection between the SERDES and IC. Furthermore, the strong covalent bond allows subsequent planarization and processing operations to be performed on the SERDES (and IC) without fear of damaging any data interconnections.
According to an embodiment of the invention, a flex interconnect can be used to carry data between the SERDES and an opto-electric converter, such as a VCSEL/detector array. The flex interconnect replaces the problematic flip-chip or BGA interface between the SERDES and opto-electric converter found in conventional optical transceiver implementations. Due to its relative ease of alignment and installation, the flex interconnect greatly simplifies the manufacturing process of the optical transceiver. According to an embodiment of the invention, the opto-electric converter can include a fiber connector to allow attachment of an optical fiber for transmission of optical signals. According to another embodiment of the invention, a transparent window is placed adjacent to the opto-electric converter to allow free space transmission of optical signals. According to other embodiments of the invention, the SERDES-IC construction can be installed using a flip-chip configuration to allow more direct contact between the SERDES and flex interconnect.
According to other embodiments of the invention, the opto-electric converter is covalently bonded directly onto the SERDES or directly onto the IC. In either case, all the optical transceiver components are fully integrated with the IC, thereby eliminating the need for a flex interconnect (and its associated bandwidth limitations). Furthermore, by combining the optical transceiver components at the die level, costly package-level manufacturing operations are minimized. A fiber connector or transparent window can be provided at the opto-electric converter to permit optical fiber or free space data link connections, respectively. According to other embodiments of the invention, the opto-electric converter-SERDES-IC construction can be mounted in a flip-chip configuration.
According to another embodiment of the invention, the SERDES and opto-electric converter are formed in a single die. While integratio
Baier Steven M.
Grung Bernard L.
Walters Wayne L.
Healy Brian
Kubodera John
Lin Tina M
Xilinx , Inc.
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