High speed sensor system using a level shift circuit

Details High speed sensor system using a level shift circuit High speed sensor system using a level shift circuit

1989-01-30

1991-01-08

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

365203, 365208, 307530, G11C 700

Patent

active

049842048

ABSTRACT:
A semiconductor memory device has a sense amplifier which is constructed with a level shift circuit having an input which senses the change in a data line from an initial precharged level to a level near the vicinity of the supply voltage level which corresponds to data reading amounts from a memory cell during the reading mode of operation of the memory. The level shift circuit, in response to a memory cell reading signals, provides a level shifted output to the input terminal of a differential sense amplifier circuit, the level shifted output being in the vicinity of the operating point of the differential sense amplifier circuit. The level shift circuit includes a current amplifier having an output terminal that is formed with a series connecting node of a current amplifying transistor and a current source.

REFERENCES:
patent: 4625298 (1986-11-01), Sumi
patent: 4697112 (1987-09-01), Ohtani et al.
"A 64Kb Static RAM", Digest of Technical Papers, pp. 236-237 (1980 IEEE Int. Solid State Circuits Conference, Feb. 15, 1980) by T. Ohzone, et al.

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