High-speed sense amplifier having feedback loop

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing

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365207, 327 51, 327 54, G11C 700

Patent

active

054576571

ABSTRACT:
A high-speed sense amplifier for a memory device with at least one memory cell, comprising true and complementary bit lines connected to the memory cell, a differential amplification circuit for inputting true and complementary bit data through the true and complementary bit lines, amplifying the inputted true and complementary bit data and transferring the amplified true and complementary bit data to true and complementary data bus lines, respectively, a first feedback loop for feeding the amplified true bit data on the true data bus line back to the memory cell through the true bit line, and a second feedback loop for feeding the amplified complementary bit data on the complementary data bus line back to the memory cell through the complementary bit line. According to the invention, the high-speed sense amplifier can sense and amplify the data on the true and complementary bit lines at a high speed. Therefore, an access speed of the memory device can be enhanced.

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patent: 4697112 (1987-09-01), Ohtani et al.
patent: 5126974 (1992-06-01), Sasaki et al.
patent: 5155397 (1992-10-01), Fassino et al.
patent: 5189322 (1993-02-01), Chan et al.

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