High-speed semiconductor device having a dual-layer gate structu

Details High-speed semiconductor device having a dual-layer gate structu High-speed semiconductor device having a dual-layer gate structu

1999-06-28

2000-03-14

Chang, Joni

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438597, 438638, 438640, 438668, 438670, 438671, 438672, 438673, 438675, H01L 213205

Patent

active

060372451

ABSTRACT:
A fabricating process of a semiconductor device includes the steps of forming a first photoresist layer on a surface of a substrate so as to cover a gate electrode on the substrate, forming a second photoresist layer on the fist photoresist layer with an increased sensitivity, forming a third photoresist layer on the second photoresist layer with a reduced sensitivity, forming an opening in a photoresist structure thus formed of the first through third photoresist layers such that the opening exposes the gate electrode and such that the opening has a diameter that increases gradually from the first photoresist layer to the second photoresist layer. Further, a low-resistance metal layer is deposited on the photoresist structure including the opening, such that the metal layer forms a low-resistance electrode on the gate electrode.

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