High speed redundant data sensing method and apparatus

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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C365S207000

Reexamination Certificate

active

11264120

ABSTRACT:
An apparatus and method for coupling a normal bit line pair and a second bit line pair onto a desired bit line pair are described. This method comprises driving the desired bit line pair to emulate the normal bit line pair during a read cycle. Additionally, if the second bit line pair is active, the apparatus and method include overdriving the desired bit line pair with strength sufficient to overpower the normal bit line pair, such that the desired bit line pair emulates the second bit line pair. Electrical current differences in the bit line pair may be sensed by a sense amplifier to assert or negate a data output such that it emulates the desired bit line pair. The normal bit line pair may be coupled to a normal memory column and the second bit line pair may be coupled to a redundant memory column.

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