High speed receiver with wide input voltage range

Details High speed receiver with wide input voltage range High speed receiver with wide input voltage range

2006-11-07

2006-11-07

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S083000, C326S086000, C326S087000, C326S090000, C326S127000

Reexamination Certificate

active

07132857

ABSTRACT:
A receiver circuit (12) includes a first gate (24) that receives an input signal (VIN0, VIN1) and has an output (32, 34) for providing an output signal (VG0, VG1). A shifting circuit (20) is coupled for shifting the common mode potential of the input signal to produce a shifted signal (VSH0, VSH1). A second gate (22) has an input (27, 28) that receives the shifted signal and an output coupled to the output of the first gate.

REFERENCES:
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patent: 5945863 (1999-08-01), Coy
patent: 6177822 (2001-01-01), Okuyama
patent: 6320406 (2001-11-01), Morgan et al.
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patent: 6856169 (2005-02-01), Frans et al.
patent: 6870391 (2005-03-01), Sharpe-Geisler
patent: 6911871 (2005-06-01), Li et al.
Micrel Datasheet, ‘3.3V, 2.5Gbps Any Input-to-LVPECL Dual Translator’—‘SuperLite™ SY55857L Final’, Rev.: B, Amendment:/0, Issue Date: Mar. 2003.

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