High speed pointer based first-in-first-out memory

Details High speed pointer based first-in-first-out memory High speed pointer based first-in-first-out memory

1986-09-16

1989-08-29

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Serial read/write

365 75, 377 64, G11C 1300

Patent

active

048624195

ABSTRACT:
A FIFO memory system organizes a memory with N word storage locations into M pointer-based random access memories, each containing N/M storage locations. A sequence of data words is written into and read out of the M RAMs in a cyclical fashion. An M fold increase in write rate is obtained by an input control logic which causes all M RAMs to be in a different stage of the shift-in cycle at the same time. Similarly, an M fold increase in read rate is obtained by an output control logic which causes all M RAMs to be simultaneously in a different stage of the shift-out cycle. The output signals of the RAMs being read are multiplexed to generate the original sequence.

REFERENCES:
patent: 3976842 (1976-08-01), Hoyt
patent: 4151609 (1979-04-01), Moss
patent: 4152781 (1979-05-01), Aichelman, Jr.
patent: 4374428 (1983-02-01), Barns

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