High speed output buffer with reduced voltage bounce and no cros

Details High speed output buffer with reduced voltage bounce and no cros High speed output buffer with reduced voltage bounce and no cros

1993-05-13

1994-11-22

Hudspeth, David R.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

326 82, 326 57, H03K 19003

Patent

active

053672054

ABSTRACT:
There is an output buffer which reduces the amount of voltage bounce occurring during the switching of the outputted signal. Uniquely, there is an output buffer/driver which turns on either driver transistor by progressively increasing the voltage on the control gates in a series of steps. Additionally, and simultaneously, the complementary signal is turned off immediately to prevent any possibility of creating current crossing in the output driver. Additionally, the invention has the advantage of avoiding cross current from occurring during switching of the output signals.

REFERENCES:
patent: 4103188 (1978-07-01), Morton
patent: 4818901 (1989-04-01), Young et al.
patent: 5036232 (1991-07-01), Jungert et al.
patent: 5057711 (1991-10-01), Lee et al.
patent: 5118971 (1992-06-01), Schenck
patent: 5124579 (1992-06-01), Naghshima

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