High speed OC-768 configurable link layer chip

Details High speed OC-768 configurable link layer chip High speed OC-768 configurable link layer chip

2006-01-03

2006-01-03

Dang, Khanh (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C370S366000

Reexamination Certificate

active

06983342

ABSTRACT:
An integrated circuit comprising a plurality of link layer controllers. The plurality of link layer controllers may be configured to operate independently in a first mode and cooperatively in a second mode.

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