Dynamic information storage or retrieval – Binary pulse train information signal – Including sampling or a/d converting
Reexamination Certificate
2005-02-16
2009-11-10
Young, Wayne R (Department: 2627)
Dynamic information storage or retrieval
Binary pulse train information signal
Including sampling or a/d converting
C369S059220, C369S059150
Reexamination Certificate
active
07616547
ABSTRACT:
A high-speed mixed analog/digital PRML data detection and clock recovery apparatus and method. The high-speed mixed analog/digital PRML data detection and clock recovery apparatus includes a variable gain amplifier, an analog equalizer, an analog-to-digital (A/D) converter, a DC offset remover, a level error detector, a Viterbi decoder, and an adaptive digital controller. The adaptive digital controller separately stores the level error values by predetermined frequencies, calculates predetermined coefficient values by each frequency component based on the level error values, and D/A-converts and applies the calculated predetermined coefficient values to the variable gain amplifier and the analog equalizer.
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Lee Jae-wook
Lee Jeong-won
Lee Jung-eun
Lee Jung-hyun
Maxim Konakov
Pendleton Dionne H
Samsung Electronics Co,. Ltd.
Staas & Halsey , LLP
Young Wayne R
LandOfFree
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