High speed methods for maintaining a summary of thread...

Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling

Reexamination Certificate

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Details

C718S106000, C718S107000, C711S124000, C711S147000, C711S149000, C711S158000

Reexamination Certificate

active

06886162

ABSTRACT:
A high-speed method for maintaining a summary of thread activity reduces the number of remote-memory operations for an n processor, multiple node computer system from n2to (2n−1) operations. The method uses a hierarchical summary of-thread-activity data structure that includes structures such as first and second level bit masks. The first level bit mask is accessible to all nodes and contains a bit per node, the bit indicating whether the corresponding node contains a processor that has not yet passed through a quiescent state. The second level bit mask is local to each node and contains a bit per processor per node, the bit indicating whether the corresponding processor has not yet passed through a quiescent state. The method includes determining from a data structure on the processor's node (such as a second level bitmask) if the processor has passed through a quiescent state. If so, it is then determined from the data structure if all other processors on its node have passed through a quiescent state. If so, it is then indicated in a data structure accessible to all nodes (such as the first level bitmask) that all processors on the processor's node have passed through a quiescent state. The local generation number can also be stored in the data structure accessible to all nodes. If a processor determines from this data structure that the processor is the last processor to pass through a quiescent state, the processor updates the data structure for storing a number of the current generation stored in the memory of each node.

REFERENCES:
patent: 4916697 (1990-04-01), Roche et al.
patent: 4945500 (1990-07-01), Deering
patent: 5442758 (1995-08-01), Slingwine et al.
patent: 5727209 (1998-03-01), Slingwine et al.
patent: 5909540 (1999-06-01), Carter et al.
“Sting: A CC-NUMA Computer System for the Commercial Marketplace,”ISCA '96, by Tom Lovett and Russell Clapp, pp. 308-317 (1996).

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