Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2006-09-12
2006-09-12
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Interconnection arrangements
C365S101000
Reexamination Certificate
active
07106610
ABSTRACT:
A memory interface and a method to interface with high-speed memory devices have been disclosed. One embodiment of the memory interface includes an inductor and a number of transmission lines. The transmission lines are coupled to the inductor in series to couple a number of memory devices to a circuit board.
REFERENCES:
patent: 6157688 (2000-12-01), Tamura et al.
patent: 6661092 (2003-12-01), Shibata et al.
patent: 6745268 (2004-06-01), Greeff et al.
Fahmy Hany M.
Ryu Woong H.
Blakely , Sokoloff, Taylor & Zafman LLP
Dinh Son T.
Intel Corporation
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