High speed memory arranged for operating synchronously with a mi

Details High speed memory arranged for operating synchronously with a mi High speed memory arranged for operating synchronously with a mi

1996-11-08

1999-11-09

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Serial read/write

365233, G11C 1300

Patent

active

059826940

ABSTRACT:
A synchronous random access memory is arranged to be responsive directly to a system clock signal for operating synchronously with the associated microprocessor. The synchronous random access memory is further arranged to either write-in or read out data in a synchronous burst operation or synchronous wrap operation in addition to synchronous random access operations. The synchronous random access memory device may be fabricated as a dynamic storage device or as a static storage device.

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