High speed, low power input/output circuit for a multi-chip modu

Details High speed, low power input/output circuit for a multi-chip modu High speed, low power input/output circuit for a multi-chip modu

1995-04-19

1996-01-02

Westin, Edward P.

Electronic digital logic circuitry

Interface

Current driving

326 34, 326 30, H03K 1716

Patent

active

054812070

ABSTRACT:
An I/O transceiver circuit for use on each integrated circuit of a multi-chip module that controls the threshold voltage of the receiver portion and also controls the output resistance of the transmitter portion. Control of the threshold voltage allows operation of the circuit at low voltage levels and with relative immunity from process and temperature variations. Control of the output resistance allows operation without characteristically terminated I/O lines between multi-chip modules, thereby saving power otherwise wasted in the terminating resistors. Control of the threshold voltage is achieved by means of a reference circuit. Control of the output resistance is achieved by a phase-locked-loop arrangement. Further, the I/O transceiver circuit may also have a state where it clamps noise pulses on its I/O line.

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"Low Power Tri-State Driver Circuit," by W. R. Griffin and P. N. Horowitz, IBM Technical Disclosure Bulletin, vol. 24, No. 5, Oct. 1981, pp. 2556-2557.
"High Speed Complementary Driver Circuit," by W. R. Griffin and P. N. Horowitz, IBM Technical Disclosure Bulletin, vol. 24, No. 5, Oct. 1981, pp. 2558-2559.

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