High speed, low noise output buffer

Details High speed, low noise output buffer High speed, low noise output buffer

1996-09-12

1998-06-02

Wambach, Margaret Rose

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Signal transmission integrity or spurious noise override

327374, 327185, 327112, 326 27, H03K 190944, H03K 190185, H03K 1716

Patent

active

057606340

ABSTRACT:
An output buffer device utilizes a PMOS transistor as a first pull-up element and an NMOS transistor as a second pull-up element. An output signal is used to control a feedback circuit. An output signal is switched from a low to high voltage by a trigger voltage. The first pull-up element switches to the second pull-up element to complete the voltage switching from low to high. The device combines the high speed of the first pull-up element and the low noise of the second pull-up element.

REFERENCES:
patent: 5057711 (1991-10-01), Lee et al.
patent: 5122690 (1992-06-01), Bianchi
patent: 5153457 (1992-10-01), Martin et al.
patent: 5406139 (1995-04-01), Sharpe-Geisler
patent: 5519338 (1996-05-01), Campbell et al.
patent: 5537060 (1996-07-01), Baek
patent: 5583455 (1996-12-01), Kobayashi et al.
Wada et al., "Simple Noise Model and Low-Noise Data-Output Buffer for Ultra High-Speed Memories," IEEE Journal of Solid-State Circuits, vol. 25, No. 6, Dec. 1990, pp. 1586-1588.

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