Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Patent
1991-02-06
1993-10-05
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Including level shift or pull-up circuit
36523006, G11C 700
Patent
active
052511731
ABSTRACT:
Active pull-up circuits for a memory decoder/driver circuit allow standby current in the decoder/driver circuit to be reduced to a low level consistent with high switching speed. A resistor in series with the selection transistors is shunted by an active device when a word line is selected, allowing the resistor to be given a high, current limiting value to reduce power consumed by the decoder/driver circuit when the word line is deselected. The base of the word line selection transistor has a bleed resistor shunted by a feedback transistor of a complementary type to the word line selection transistor, forming a fast switching circuit having positive feedback path. A Darlington connected pull up circuit is also provided in parallel with the feedback transistor which further enhances switching speed. The circuit formed by the word line selection transistor and the feedback resistor are connected in a manner, using a Schottky diode, to stabilize the word line voltage against variations in V.sub.cc and the gain, .beta., of the word line selecting transistors. An arrangement is also provided to enhance deselection speed by discharging the base node of the word line driving transistor. This decoder/driver arrangement is particularly advantageous where the memory is comprised of cells of the Harper PNP type which exhibit a low soft error rate even at low standby currents.
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International Business Machines - Corporation
LaRoche Eugene R.
Nguyen Tan
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