High speed level shift circuit for low voltage output

Details High speed level shift circuit for low voltage output High speed level shift circuit for low voltage output

1999-06-23

2002-11-19

Lee, Michael G. (Department: 2876)

Electronic digital logic circuitry

Interface

C326S067000, C326S078000, C326S080000, C326S127000

Reexamination Certificate

active

06483345

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method and apparatus for high speed level shifting to provide a low voltage output, and a system incorporating the same.
BACKGROUND TO THE INVENTION
Logic signals at very high speed are often processed using bipolar Current Mode Logic (CML)—a signalling system involving small voltage swings (typically 250 mV) referenced to the positive supply of the integrated circuit (IC). Output interface levels from an IC using this logic are generally specified with a greater signal swing than 250 mV.
For a bipolar transistor to operate at speed it is necessary that its collector base junction does not enter forward conduction. Therefore, in order to allow increased signal swing on the output stage, the logic signals which drive it have to be level shifted from the positive rail reference down to a lower voltage. The more the signal can be shifted the greater the potential output swing.
Known attempts to level shift very high speed logic signals from a positive power rail reference down to a level as close as possible to a ground or negative rail, however, have encountered a number of problems.
Use of complementary vertical PNP transistors in the signal path slowed the signal since PNP's are inherently slower than NPN's. Their use also added considerably to the complexity of the semiconductor process since extra process steps were required in their fabrication.
Use of NPN diode level shifters was also considered. However this approach did not take account of power supply variation and required circuit complexity to allow for the temperature variation of the forward voltage drop of the diode junction. Tolerancing these circuits over temperature and power rail variation was therefore difficult since, in general, complexity in the signal path leads to slow circuits.
OBJECT OF THE INVENTION
The present invention seeks to provide an improved method and apparatus for high speed level shifting for low voltage output.
SUMMARY OF THE INVENTION
According to a first aspect of the present invention there is provided an electronic circuit arranged to receive a common mode input data signal referenced to a first positive reference voltage supply and to provide an intermediate data signal referenced to a second positive reference voltage supply, wherein said second reference voltage is lower than said first reference voltage.
Preferably, all transistors through which data signals pass between said input data signal and said intermediate data signal are NPN transistors.
Advantageously, level shifting of very high speed logic signals from the positive power rail reference down to a level as close as possible to the ground power rail without use of vertical PNP transistors in the signal path avoids slowing the signal since PNP's are inherently slower than NPN's, and avoids adding considerable complexity of the semiconductor fabrication process that would arise from additional steps required to form vertical PNP's.
Advantageously, signals referenced to the ground rail may be used to drive a very fast long tailed pair output stage with minimal loss of voltage headroom and hence best efficiency.
Advantageously, the present invention maximises the drive capability of such a high speed output signal without invoking any additional power rails or any special process steps in the fabrication of the IC.
Advantageously, the circuit may operate from a single external power supply.
Preferably said input data signal, and intermediate data signal are common mode logic signals.
Preferably said first and second voltages are both positive.
Advantageously this does not require provisioning of a negative power rail which would be expensive, require more power, and impose greater voltage stress on the integrated chip.
Preferably the maximum voltage of said intermediate signal does not exceed said second reference voltage.
Preferably said second reference voltage is maintained within lower tolerances than said first reference voltage.
Preferably said second reference voltage is provided from a band gap supply.
Advantageously, the circuit takes account of power supply variation and overcomes the problems associated with temperature variation of the forward voltage dcp associated with use of diode junction: tolerancing these circuits over temperature and power rail variation is more straightforward since the circuitry involved is simpler.
In a preferred embodiment, said first circuit comprises a first and second input circuits, a sensing element, and a current mirror circuit.
In a preferred embodiment the circuit additionally comprises a second circuit arranged to regenerate said intermediate data signal whereby to provide an output data signal.
Preferably, said second circuit comprises a long-tailed pair.
The arrangement may also comprise a third circuit arranged to provide a second output data signal referenced to said second reference voltage supply and having high current drive.
Preferably said high current drive is drawn from said first reference voltage supply.
Preferably said third circuit comprises a feedback circuit, whereby to maintain said second output data signal within tolerances.
The arrangement may also comprise a laser modulator circuit arranged to provide an optical output data signal responsive to receipt of said output data signal.
According to a second aspect of the present invention there is provided a laser modulator package assembly comprising an electronic circuit arrangement according to the first aspect of the present invention.
Preferably said electronic circuit arrangement comprises a laser modulator circuit arranged to provide an optical output data signal responsive to receipt of said output data signal.
According to a third aspect of the present invention there is provided an optical transmitter circuit board comprising a laser modulator package.
According to a fourth aspect of the present invention there is provided a telecommunications system comprising an electronic circuit arrangement.
The invention also provides for a system for the purposes of digital signal processing which comprises one or more instances of apparatus embodying the present invention, together with other additional apparatus.
The invention is also directed to a method by which the described apparatus operates and including method steps for carrying out every function of the apparatus.
In particular, according to a fifth aspect of the present invention there is provided a method of level shifting an input data signal comprising the stages of providing said input data signal referenced to a first positive reference voltage supply, generating an intermediate data signal referenced to a second positive reference supply responsive to receipt of said input data signal, wherein said second reference voltage is lower than said first reference voltage.
In a preferred embodiment, the method additionally comprises the steps of generating an output data signal with high current drive and referenced to said second positive reference voltage supply with high current drive responsive to receipt of said intermediate data signal,
In a further preferred embodiment, the method additionally comprises the steps of providing an optical output data signal responsive to receipt of said intermediate data signal.
The preferred features may be combined as appropriate, as would be apparent to a skilled person, and may be combined with any of the aspects of the invention.


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Patent Abstracts of Japan vol. 1997: Publication No. 09200037, Publication Date Jul. 31, 1997.

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