Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1978-02-21
1980-12-02
Anagnos, Larry N.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307215, 307218, 307289, 307355, H03K 1900, H03K 1920, H03K 3286, H03K 520
Patent
active
042373875
ABSTRACT:
A window comparator latch network is disclosed for track or sampling a differential input signal and for "latching" the input signal upon a clock signal. Several latch networks are disclosed for both single and dual differential input configurations. The dual input configuration includes first and second pairs of differential transistors which are coupled to a differential regenerative and latching pair of transistors. The regenerative and latching transistor pair provides an output signal having first or second states only upon the required clock signal being applied to a current switching transistor pair. Negative differential signals applied to both first and second pairs of differential transistors results in a "0" logic state output signal from the regenerative and latching transistors. A positive differential signal results in a logic "1" output state. Positive input signals applied to both differential transistors results in a logic "0" output state. Thus the latch network provides a "window" output signal.
REFERENCES:
patent: 3424928 (1969-01-01), Priel et al.
patent: 3440449 (1969-04-01), Priel et al.
patent: 3617776 (1971-11-01), Priel
patent: 3644758 (1972-02-01), Matsue et al.
patent: 3728560 (1973-04-01), Treadway
patent: 3818250 (1974-06-01), Reed et al.
patent: 3953746 (1976-04-01), Fett
Gersbach, "Surefire Latch", IBM Tech. Discl. Bull., vol. 18, No. 1, p. 73, 6/1975.
Baskevitch Eugene
Devendorf Don C.
Adam W. J.
Anagnos Larry N.
Hughes Aircraft Company
MacAllister W. H.
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