High speed latching circuit with level shift output circuits

Details High speed latching circuit with level shift output circuits High speed latching circuit with level shift output circuits

1989-01-09

1991-01-01

Callahan, Timothy P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307475, 307291, 307446, 3072721, H03K 326, H03K 329

Patent

active

049821113

ABSTRACT:
For prompt response to an alternation of input signal, a latching circuit comprises two NAND gates each responsive to the input signal or the inverse thereof as well as an enable signal to produce an output signal or the inverse thereof, two level shifting circuits operative to shift the output signal and the inverse thereof in voltage level, and the controller providing a voltage level to partially define the shifting range of the output signal, and each of the level shifting circuits has a capacitor and two level shifters connected to the capacitor and the controller, respectively, so that the controller has no affection of the capacitor, thereby allowing the latching operation to be improved in speed.

REFERENCES:
patent: 4695743 (1987-09-01), Des Brisay, Jr.
patent: 4827157 (1989-05-01), Machida et al.

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