High-speed large output amplitude voltage level shifting circuit

Electronic digital logic circuitry – Interface – Logic level shifting

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326 71, H03K 19094

Patent

active

054711495

ABSTRACT:
A voltage level shifting circuit which enables realization of high sensitivity input, high speed, and large output amplitude with a low power consumption, wherein a flipflop is constituted by two CMOS inverters, INV.sub.1 and INV.sub.2, the power voltage sides of the CMOS inverters are used as the inputs of the signals, transfer gates are connected between the input terminals of the input signals and the input terminals of the CMOS inverters, and the transfer gates are turned on and off by the same clock signal CLK.

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patent: 4920284 (1990-04-01), Denda
patent: 5070262 (1991-12-01), Hashimoto
patent: 5332936 (1994-07-01), Nakao

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