High-speed interconnection adapter having automated lane...

Details High-speed interconnection adapter having automated lane... High-speed interconnection adapter having automated lane...

2007-03-27

2007-03-27

Patel, Jay K. (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S369000, C375S373000, C370S503000, C711S116000, C711S169000

Reexamination Certificate

active

10680913

ABSTRACT:
An adapter that buffers received symbols and automatically determines and corrects for skew between lanes is disclosed. In one embodiment, the adapter is a part of a network that includes a first and second devices coupled together by a communications link having multiple independent serial lanes. The first device initiates communication by repeatedly transmitting a training sequence that includes a start symbol for each lane. An adapter in the second device includes a set of buffers each configured to receive the symbols conveyed by a corresponding serial lane. The buffers are coupled to a reconstruction circuit that removes one “symbol group” at a time from the buffers. A symbol group is made up of one symbol from each buffer. The reconstruction circuit removes symbol groups until a start symbol is detected. If the start symbol is not detected in all buffers, output from the buffers having start symbols is temporarily suspended.

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