High speed I.sub.DDQ monitor circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

327 52, 327 94, 327103, 327538, H03D 100, G01R 1900, H02M 1100, G05F 110

Patent

active

056940637

ABSTRACT:
A process for determining a quiescent power supply current (I.sub.DDQ) of a device under test (DUT) at a first node. The process includes the steps of providing a reference current to the first node and decoupling a power supply from the first node. A first node voltage is determined at a first time after the power supply is decoupled from the first node. The first node voltage is determined at a second time after the first time. If the first node voltage increases from the first time to the second time, it is indicated that the I.sub.DDQ of the DUT is less than the reference current. If the first node voltage decreases from the first time to the second time, it is indicated that the I.sub.DDQ of the DUT is greater than the reference current.

REFERENCES:
patent: 4782290 (1988-11-01), Sakai et al.
patent: 5059889 (1991-10-01), Heaton
patent: 5128567 (1992-07-01), Tanaka et al.
patent: 5216289 (1993-06-01), Hahn et al.
patent: 5319258 (1994-06-01), Ruetz
patent: 5332973 (1994-07-01), Brown et al.
patent: 5371457 (1994-12-01), Lipp
patent: 5398318 (1995-03-01), Hiraishi et al.
patent: 5412263 (1995-05-01), Nagaraj et al.
PCT International Search Report, 5 pages.
K. M. Wallquist, A. W. Righter, and C.F. Hawkins, A General Purpose IDDQ Measurement Circuit, IEEE, 1993 Int'l Test Conference, pp. 642-651.
L. Horning, J. Soden, R. Fritzemeier & C. Hawkins, Measurements of Quiescent Power Supply Current For CMOS ICs In Production Testing, IEEE, 1987 Int'l Test Conference, pp. 300-309.
C. Crapuchettes, Testing CMOS Idd on Large Devices, IEEE, 1987 Int'l Test Conference, pp. 310-315.
M. Keating & D. Meyer, A New Approach To Dynamic Idd Testing, IEEE, 1987 Int'l Test Conference, pp. 316-321.
S. McEuen, Why IDDQ, IEEE, 1990 Int'l Test Conference, p. 252.
K. Baker & B. Verhelst, Iddq Testing Because "Zero Defects Isn't Enough", IEEE, 1990 Int'l Test Conference, pp. 253-524.
J. Soden, R. Fritzemeier & C. Hawkins, Zero Defects or Zero Stuck-At Faults--CMOS IC Process Improvement With Iddq, IEEE, 1990 Int'l Test Conference, pp. 255-256.
W. Maly, Current Testing, IEEE, 1990 Int'l Test Conference, p. 257.
S. Bollinger & S. Midkiff, On Test Generation For Iddq Testing Of Bridging Faults In CMOS Circuits, IEEE, 1991 Int'l Test Conference, pp. 598-607.
E. Vandris & G. Sobelman, A Mixed Functional/Iddq Testing Methodology For CMOS Transistor Faults, IEEE, 1991 Int'l Test Conference, pp. 608-614.
C. Chen & J. Abrahm, High Quality Tests For Switch-Level Circuits Using Current And Logic Test Generation Algorithms, IEEE, 1991 Int'l Test Conference, pp. 615-622.
R. Aitken, Fault Location With Current Monitoring, IEEE, 1991 Int'l Test Conference, pp. 623-632.
R. Kapur, J. Park & M. Mercer, All Tests For A Fault Are Not Equally Valuable For Defect Detection, IEEE, 1992 Int'l Test Conference, pp. 762-769.
R. Gulati, W. Mao & D. Goel, Detection Of "Undetectable" Faults Using Iddq Testing, IEEE, 1992 Int'l Test Conference, pp. 770-775.
R. Aitken, A Comparison Of Defect Models For Fault Location With Iddq Measurements, IEEE, 1992 Int'l Test Conference, pp. 778-787.
Y. Miura & K. Kinoshita, Circuit Design For Built-In Current Testing, IEEE, 1992 Int'l Test Conference, pp. 873-881.
R. Rodriguez-Montanes, E. M. J. G. Bruls & J. Figueras, Bridging Defects Resistance Measurements In A CMOS Process, IEEE, 1992 Int'l Test Conference, pp. 892-899.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

High speed I.sub.DDQ monitor circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High speed I.sub.DDQ monitor circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High speed I.sub.DDQ monitor circuit will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-804919

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.