High speed I/O pad and pad/cell interconnection for flip chips

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip

Reexamination Certificate

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C257S786000

Reexamination Certificate

active

06870273

ABSTRACT:
Gridded I/O pads for flip-chip packages in which a coaxial-like solder bump pad configuration is used in which the I/O pads closest to the signal or bump pad are power or ground pads. The ground pads surrounding the signal pad form a coaxial-like pad configuration for impedance matching at the transition from die to package substrate. The ground pads surrounding the signal pad may be connected by a metal trace to form a ground pad ring. The invention employs conductor-backed ground coplanar waveguides (GCPW), which match impedance at connections between I/O cells and signal pads to enhance signal transmission, avoid reflection and leakage, and provide superior electromagnetic shielding. The present invention also supports high quantities of I/Os for a given die size, and supports flexible power and ground placement.

REFERENCES:
patent: 6140710 (2000-10-01), Greenberg
patent: 6215377 (2001-04-01), Douriet
patent: 6232660 (2001-05-01), Kakimoto et al.
patent: 6242814 (2001-06-01), Bassett
patent: 20040026794 (2004-02-01), Tao et al.
P. Petre et al., “Simulation and Performance of Passive Microwave and Millimeter Wave Coplanar Waveguide Circuit Devices with Flip Chip Packaging”, IEEE Electrical Performance of Electronic Packaging, 1997, pp. 203-206.
Daniela Staiculescu, et al., “Design Rule Development for Microwave Flip-Chip Applications,” IEEE Trans. on Microwave Theory and Techniques, vol. 48, No. 9, Sep. 2000, pp. 1476-1481.

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