High-speed dual-buffered output circuit

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction

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326 28, H03K 19003

Patent

active

055171290

ABSTRACT:
In an output circuit for driving a load connected to an output terminal in accordance with an input signal input to an input terminal, the output circuit connects to the input and output terminals, a first output buffer which operates when activated; connects in parallel to the first output buffer, a second output buffer which, when activated, operates with driving ability higher than the first output buffer; and activates the second output buffer for a predetermined period when the input signal is input and, after the period, activates the first output buffer.

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