High-speed differential logic to CMOS translator...

Details High-speed differential logic to CMOS translator... High-speed differential logic to CMOS translator...

2007-11-27

2007-11-27

Chang, Daniel (Department: 2819)

Electronic digital logic circuitry

Interface

Logic level shifting

C327S333000

Reexamination Certificate

active

10852272

ABSTRACT:
Disclosed are various embodiments of a differential logic to CMOS logic translator including a level-shifting and buffering stage configured to receive differential inputs and to provide resulting signals with lower common mode voltage. Further, a gain stage is included to receive the resulting signals and to provide increased swing signals. A CMOS buffer is also included and is configured to receive the increased swing signals and to provide a CMOS logic output. Also disclosed is a method of translating a differential logic signal to a CMOS logic signal including level-shifting and buffering differential input signals to provide resulting signals with lower common mode voltage. The method also includes using a gain stage to provide increased swing signals from the resulting lower common mode signals and using a CMOS buffer to provide a CMOS output from the increased swing signals.

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