Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
1999-03-12
2002-02-26
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
C257S018000, C257S020000, C257S190000, C257S191000, C257S192000
Reexamination Certificate
active
06350993
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a silicon and silicon germanium based materials system and more specifically, to a novel epitaxial field effect transistor structure capable of high-speed low-noise, microwave, submillimeter-wave and millimeter-wave applications. Preferably, the epitaxial field effect transistor structure includes a high performance strained p-channel incorporating silicon, germanium, and silicon germanium layers to form a modulation-doped heterostructure.
BACKGROUND OF THE INVENTION
In high speed and low noise device applications, the focus has been on designing and fabricating high electron mobility transistors (HEMTs) or modulation-doped field effect transistors (MODFETs) where carrier (eg. electrons, holes) conduction occurs in an undoped channel layer such that the carrier mobility is not limited by impurity scattering and high carrier mobility is achieved. In general, these high speed electronic devices are often used as low-noise amplifiers, power amplifiers, satellite receivers and transmitters operating in the microwave and rf regime, and the material of choice is usually the faster but more expensive III-V (e.g. GaAs) materials system and technology. A complicated and costly III-V materials technology is not very desirable in the semiconductor industry whereas a less-expensive SiGe materials system which is fully compatible with present Si technology is more desirable and far easier to integrate with existing Si-CMOS device technology.
One example of a material system compatible with Si technology is described in U.S. Pat. No. 5,019,882 which issued on May 28, 1991 to P. M. Solomon entitled “Germanium Channel Silicon MOSFET” and assigned to the assignee herein. In U.S. Pat. No. 5,019,882, a channel having improved carrier mobility comprises an alloy layer of silicon and germanium which is grown above a silicon substrate. The alloy layer is kept thin enough for proper pseudomorphic dislocation free growth. A layer of silicon is formed over the alloy layer and is oxidized partially through to form a dielectric layer. A gate region is formed over the silicon dioxide.
A second example of a high performance SiGe device structure compatible with Si technology, is described in U.S. Pat. No. 5,534,713 which issued on Jul. 9, 1996 to K. E. Ismail entitled “Complementary Metal-Oxide Semiconductor Transistor Logic Using Strained Si/SiGe Heterostructure Layers” and assigned to the assignee herein. In U.S. Pat. No. 5,534,713 a silicon CMOS transistor structure is described utilizing a buried SiGe channel under compressive strain with enhanced hole mobility for a p-channel device, and a buried Si channel under tensile strain with enhanced electron mobility for an n-channel device fabricated on a strained Si/SiGe heterostructure design. Further in U.S. Pat. No. 5,534,713 the proposed compressively-strained SiGe layer serving as a p-channel for the p-channel field effect transistor is described as having a composition germanium in the range from 50 to 100% and with a preferred composition of 80%. Thus far, prototype SiGe p-channel MODFETs utilizing this channel design and composition at the IBM Corporation have yielded hole mobilities only up to 1,000 cm
2
/Vs at room temperature. Consequently, in order to achieve an even higher hole mobility of greater than 1,000 cm
2
/Vs, a p-channel design with a composite or dual layer structure composed of a Ge layer (of 15-20 Å thick) together with a SiGe layer of 70-80% Ge (of 70-100 Å thick) is presented as the optimum p-channel structure to produce a higher hole mobility in a SiGe materials system.
SUMMARY OF THE INVENTION
In accordance with the present invention, a silicon and silicon germanium based epitaxial structure for a p-type field-effect transistor that utilizes a composite or a dual layer structure of substantially pure Ge and a SiGe layer in a p-channel region is described for forming a p-channel device comprising a semiconductor substrate, a first layer of relaxed Si
1−x
Ge
x
formed epitaxially on the substrate where the Ge fraction x is in the range from 0.35 to 0.5, a second layer of p doped Si
1−x
Ge
e
formed epitaxially on the first layer, a third layer of undoped Si formed epitaxially on the second layer whereby the Si layer is under tensile strain and remains commensurate with respect to the top of the first relaxed Si
1−x
Ge
x
layer, a fourth layer of undoped Si
1−x
Ge
x
formed epitaxially on the third layer, a fifth layer of undoped Ge formed epitaxially on the fourth layer whereby the Ge layer is under compressive strain and remains commensurate with respect to the top of the first relaxed Si
1−w
Ge
w
layer, a sixth layer of undoped Si
1−y
Ge
y
formed epitaxially on the fifth layer where the Ge fraction w is in the range from 0.5 to less than 1.00 and where w−x>0.2 whereby the Si
1−w
Ge
w
layer is under compressive strain, and a seventh layer of undoped Si
1−x
Ge
x
formed epitaxially on the fifth layer. A metal layer alone to form a Schottky barrier or a dielectric and metal layer may be formed and patterned over the seventh layer to form the gate of the p-channel field effect transistor while the drain and source regions may be formed by forming p regions on either side of the gate in the layered structure. This layered structure design forms a modulation-doped heterostructure whereby the supply layer or the second p-doped Si
1−x
Ge
x
layer is located below the active composite channel of layers of five and six. Furthermore, in this layered device structure, the spacer layer which separate the active channel from the supply layer employs a dual layer comprising the third layer of undoped Si and the fourth layer of undoped Si
1−x
Ge
x
.
The invention further provides a method for forming and a p-channel field effect transistor having increased hole mobility in its channel comprising a semiconductor substrate, a first layer of relaxed Si
1−x
Ge
x
formed epitaxially on the substrate where x is in the range from 0.35 to 0.5, a second layer of p doped Si
1−x
Ge
x
formed epitaxially on the first layer, a third layer of undoped Si
1−x
Ge
x
formed epitaxially on the second layer, a fourth layer of undoped Ge formed epitaxially on the third layer whereby the Ge layer is commensurate with respect to the top of the first relaxed Si
1−w
Ge
w
layer, a fifth layer of undoped Si
1−y
Ge
y
formed epitaxially on the fourth layer where the Ge fraction w is in the range from 0.5 to less than 1.00 and the fifth Si
1−w
Ge
w
layer is under compressive strain, and a sixth layer of undoped Si
1−x
Ge
x
formed epitaxially on the fifth layer. This layered structure design describes a modulation-doped heterostructure whereby the supply layer p-doped Si
1−x
Ge
x
second layer is separated from the active composite channel in the fourth and fifth layers by a single spacer third layer design of Si or Si
1−x
Ge
x
.
The invention further provides a method and a p-channel field effect transistor having increased hole mobility in its channel comprising a semiconductor substrate, a first layer of relaxed Si
1−x
Ge
x
formed epitaxially on the substrate where x is in the range from 0.35 to 0.5, a second layer of undoped Ge formed epitaxially on the top of the first layer whereby the Ge layer is commensurate with respect to the top of the first relaxed Si
1−x
Ge
x
layer, a third layer of undoped Si
1−w
Ge
w
formed epitaxially on the second layer where the Ge fraction w is in the range from 0.5 to less than 1.00 and the third Si
1−w
Ge
w
layer is under compressive strain, a fourth layer of undoped Si
1−x
Ge
x
formed epitaxially on the third layer, and a fifth layer of p-doped Si
1−x
Ge
x
formed epitaxially on the fourth layer. This layered structure design describes a modulation-doped heterostructure whereby the supply layer or the fifth layer of p-doped Si
1−x
Ge
x
is located above the active composite channel comprising the seco
Chu Jack Oon
Hammond Richard
Ismail Khalid EzzEldin
Koester Steven John
Mooney Patricia May
Fenty Jesse A.
Lee Eddie
Trepp Robert M.
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