High speed column redundancy scheme

Details High speed column redundancy scheme High speed column redundancy scheme

1999-03-04

2000-08-01

Nguyen, Viet Q.

Static information storage and retrieval

Read/write circuit

Bad bit

3652257, 36523002, 36523006, G11C 700

Patent

active

060976454

ABSTRACT:
A redundancy circuit (300) for generating a standard column access signal (STD) and a redundant column access signal (RED) is disclosed. A modified NOR-type decoder (310) determines if an applied address is the same as a defective address. In the event the applied address is the same as the defective address, a match indication is activated. In the event the applied address is different than the defective address, a no match indication is generated. The match indication activates the RED signal and the no match indication activates the STD signal, according to the timing of a "mimic" circuit (312). The mimic circuit (312) emulates the slowest resolution of the match
o match indication by the modified NOR-type decoder (310).

REFERENCES:
patent: 5548225 (1996-08-01), Roundtree et al.
patent: 5841712 (1998-11-01), Wendell et al.
patent: 5896328 (1999-04-01), Tanizaki et al.
patent: 5959903 (1999-09-01), Chen et al.

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