High-speed clock and data recovery circuit

Details High-speed clock and data recovery circuit High-speed clock and data recovery circuit

2007-10-23

2007-10-23

Payne, David C. (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S355000, C375S373000, C327S002000, C327S141000, C327S144000, C327S147000, C327S152000

Reexamination Certificate

active

10616021

ABSTRACT:
A 40-Gb/s clock and data recovery (CDR) circuit incorporates a quarter-rate phase detector and a multi-phase voltage controlled oscillator to re-time and de-multiplex a 40-Gb/s input data signal into four 10-Gb/s output data signals. The circuit is fabricated in 0.18 μm CMOS technology.

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