High speed bus with tree structure for selecting bus driver

Electronic digital logic circuitry – Multifunctional or programmable – Array

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326 86, H03K 190185, H03K 19177

Patent

active

059364246

ABSTRACT:
According to the invention, a structure is provided for driving a bus line that is both fast and small. Instead of a plurality of tristate buffers, one for each input signal, a plurality of multiplexers or gates is connected into a tree structure. The tristate enable line of the tristate buffer becomes the control line for enabling the tree structure to place its own input signal onto the bus instead of propagating the signal already on the bus. A buffer element then allows the resulting signal to be tapped from the bus. One embodiment of the invention includes lookahead logic similar to a lookahead carry chain. This allows large numbers of input lines to be connected to a bus line while retaining high speed. The symmetrical delay of a tree structure minimizes the greatest delay and thus increases predicted speed.

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