Electronic digital logic circuitry – Multifunctional or programmable – Array
Patent
1997-10-14
1999-08-10
Tokar, Michael
Electronic digital logic circuitry
Multifunctional or programmable
Array
326 86, H03K 190185, H03K 19177
Patent
active
059364246
ABSTRACT:
According to the invention, a structure is provided for driving a bus line that is both fast and small. Instead of a plurality of tristate buffers, one for each input signal, a plurality of multiplexers or gates is connected into a tree structure. The tristate enable line of the tristate buffer becomes the control line for enabling the tree structure to place its own input signal onto the bus instead of propagating the signal already on the bus. A buffer element then allows the resulting signal to be tapped from the bus. One embodiment of the invention includes lookahead logic similar to a lookahead carry chain. This allows large numbers of input lines to be connected to a bus line while retaining high speed. The symmetrical delay of a tree structure minimizes the greatest delay and thus increases predicted speed.
REFERENCES:
patent: Re34363 (1993-08-01), Freeman
patent: 5001368 (1991-03-01), Cliff et al.
patent: 5185706 (1993-02-01), Agrawal et al.
patent: 5231588 (1993-07-01), Agrawal et al.
patent: 5317209 (1994-05-01), Garverick et al.
patent: 5376844 (1994-12-01), Pedersen et al.
patent: 5504440 (1996-04-01), Sasaki
patent: 5506517 (1996-04-01), Tsue et al.
patent: 5600264 (1997-02-01), Duong et al.
patent: 5635851 (1997-06-01), Tavana
patent: 5646546 (1997-07-01), Bertolet et al.
patent: 5773994 (1998-06-01), Jones
patent: 5834949 (1998-11-01), Oba
patent: 5847577 (1998-12-01), Trimberger
patent: 5872463 (1999-02-01), Pedersen
"The Programmable Logic Data Book", 1994, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124, pp. 2-16 through 2-24.
"The XC5200 Logic Cell Array Family Technical Data", Oct. 1995, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124, pp. 1 through 20.
"The Programmable Logic Data Book", 1996, published by Xilinx Inc., 2100 Logic Drive, San Jose, CA, 95124, pp. 4-1 to 4-49.
Bapat Shekhar
Chaudhary Kamal
Costello Philip D.
Krishnamurthy Sridhar
Young Steven P.
Roseen Richard
Tokar Michael
Xilinx , Inc.
Young Edel M.
LandOfFree
High speed bus with tree structure for selecting bus driver does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High speed bus with tree structure for selecting bus driver, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High speed bus with tree structure for selecting bus driver will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1123534