Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-07-24
2007-07-24
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
10847507
ABSTRACT:
A method for preparing a printed circuit board and an apparatus are provided to decrease losses associated with high speed signal propagation. The printed circuit board has at least two conductive layers separated by an dielectric layer formed of a dielectric material. A conductive path is formed in one of the conductive layers for propagation of the high speed signal. At least a portion of the dielectric layer is removed on both sides of and adjacent to the conductive path. The removed portion extends in the dielectric layer between the conductive layers from one to the other and includes a hole shaped portion and a trough shaped portion. The removed portion does not extend beyond the dielectric layer.
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Bowers Brandon
Chiang Jack
Gateway Inc.
Hunt, Jr. Ross F.
Stiles & Harbison PLCC
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