Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent
1998-01-30
1999-11-09
Tokar, Michael
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
326 30, 326 21, 326 86, 326 90, 326 82, 333100, 333124, 333128, H03K 1716, H03K 190175, H01K 308
Patent
active
059821922
ABSTRACT:
A high speed bus circuit system according to the present invention includes a bus having alternately connected resistors and transmission lines, and integrated circuits. Each of the resistors has a predetermined resistance value. The transmission lines are mounted on print circuit boards. The bus is connected in a loop form as a whole. Each of the integrated circuits has a driver and a receiver. The driver and receiver are connected to respective one of the resistors. As a result, DC power dissipation in the terminal resistor of the bus circuit is suppressed. In addition, high speed signal transfer causing less waveform distortion is made possible.
REFERENCES:
patent: 5347177 (1994-09-01), Lipp
patent: 5528168 (1996-06-01), Kleveland
patent: 5668834 (1997-09-01), Takekuma et al.
patent: 5757249 (1998-05-01), Gabara et al.
patent: 5850154 (1998-12-01), Higuchi
Cho James H.
Mitsubishi Denki & Kabushiki Kaisha
Tokar Michael
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