High speed binary counter

Details High speed binary counter High speed binary counter

1981-05-04

1983-10-04

Chin, Gary

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Using particular code or particular counting sequence

377116, H03K 2308

Patent

active

044083360

ABSTRACT:
A plurality of two stage Gray code counters are connected in series to generate a multiple bit pseudo Gray code count C.sub.0, C.sub.1, . . . , C.sub.7. A binary count B.sub.0, B.sub.1, . . . , B.sub.7 is then generated by using the odd subscripted bits C.sub.1, C.sub.3, C.sub.5, C.sub.7 of the pseudo Gray code as the binary count bits B.sub.1, B.sub.3, B.sub.5, B.sub.7 and generating the even subscripted bits of the binary count B.sub.0, B.sub.2, B.sub.4, B.sub.6 by Exclusive ORing the odd and even position counts of each two stage Gray code counter together in Exclusive OR circuits.

REFERENCES:
patent: 2922151 (1960-01-01), Reiling
patent: 3349332 (1967-10-01), Bleickardt
patent: 3373421 (1968-03-01), Wang
patent: 3515341 (1970-06-01), Frick
patent: 3588461 (1971-06-01), Halsall
patent: 4264807 (1981-04-01), Moen et al.

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