High speed arithmetic operations for use in turbo decoders

Details High speed arithmetic operations for use in turbo decoders High speed arithmetic operations for use in turbo decoders

2006-08-08

2006-08-08

Torres, Joseph (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S795000, C714S796000

Reexamination Certificate

active

07089481

ABSTRACT:
Techniques for performing substantially concurrent add-compare-select-add operations and substantially concurrent compare-select-add operations for use in turbo decoders are provided. In one aspect of the invention, a technique for processing data in accordance with a turbo decoder comprises the following steps. Data values of two sets of input data are respectively added to generate a set of sums. Substantially concurrent with the addition step, correction values are respectively added to the sums to generate a set of corrected sums. Substantially concurrent with the respective input data value and correction value addition steps, the sums are compared against one another, and an absolute value of a difference between the sums is compared against base and bound values. Then, one of the corrected sums is selected based on the comparison steps. Preferably, respective sub-steps within the input value addition step, the correction value addition step, and the comparison step are performed concurrently.

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