Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Diffusing a dopant
Reexamination Certificate
2001-04-09
2003-03-11
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Diffusing a dopant
C257S345000, C257S402000, C257S403000, C438S539000, C438S518000, C438S526000, C438S533000, C438S537000
Reexamination Certificate
active
06531379
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method of implanting impurity atoms into the surface of a semiconductor substrate using a scanning atomic force probe. The scanning atomic force probe employed in the present invention provides better control, i.e. placement, of the impurity atoms into the substrate and provides higher impurity resolution which cannot be obtained using conventional ion implantation processes. Moreover, the atomic force probe is capable of controlling the drive-in depth of the impurity atoms to near the substrate's surface so that, despite some diffusion during annealing, the activated impurity region (dopant or bandgap) is still close to the surface of the substrate. This permits formation of a shallow, narrow diffusion region within the substrate so that very small devices can be built thereon.
The present invention also provides heterojunction semiconductor devices which contain a tapped-in dopant or bandgap region which is formed laterally in a semiconductor substrate using the method of the present invention.
BACKGROUND OF THE INVENTION
In the field of semiconductor manufacturing, it is well known to use a low energy, low dose ion implantation process to incorporate impurity atoms into a semiconductor substrate. While conventional ion implantation is capable of providing implant regions in most devices, it does not always provide sufficient ion placement, resolution and shallow depths that are typically required even for today's deep-submicron semiconductor devices; and will not be adequate for more aggressively scaled-down devices in the near future.
For example, in the context of silicon VLSI technology, the volume bounded by a sub-0.1 &mgr;m channel length, L, metal oxide semiconductor field effect transistor (MOSFET) having sub-micron gate widths, W, where W is less than 0.10 &mgr;m, and which is doped with at most 1.0×10
18
atoms/cm
3
(implying a maximum depletion depth of 0.10 &mgr;m) will contain on the order of 25 to 100 dopant atoms. The percent control, C, of the integrated dose of this threshold implant is roughly proportional to [1-sqt (N)/N], wherein N is the number of dopant atoms in the depletion region. Thus, when N=1000, the percent control, C, is roughly 99%; when N=100, C is equal to 90%; and when N=25, C is about 80%. Clearly, the degree of dose control drops precipitously for very small semiconductor devices.
In view of the current trend towards smaller and smaller semiconductor devices, there is a need for developing new and improved methods for incorporating dopant atoms into semiconductor substrate. Such methods should provide improved controllability as well as resolution while limiting the dopant drive-in depth to within 1 to 3 monolayers from the substrate's surface.
One known alternative to using conventional low energy, low dose ion implantation is to employ a Scanning Tunneling Microscope (STM). In this prior art technique, a voltage is applied between the tip of the microscope and the semiconductor sample. When the tip of the Scanning Tunneling Microscope is brought in close proximity to the semiconductor sample (i.e. gap≦1 nm), ionized atoms accelerate through the gap due to the electric field in the gap and are implanted into the semiconductor sample. While Scanning Tunneling Microscopy might be used in some applications, it may not afford the controllability in dopant placement due to electric field lateral dispersion and dopant drive-in depth required for today's generation of sub-micron semiconductor devices. A bigger problem is the need for high vacuum in which to operate the STM.
SUMMARY OF THE INVENTION
One object of the present invention is to provide a novel method for incorporating impurity atoms, i.e. dopant atoms or bandgap material, into a semiconductor substrate which provides improved placement, percent control and number of impurity atoms within a semiconductor substrate.
Another object of the present invention is to provide a method of incorporating impurity atoms into a semiconductor substrate within a controlled depth that is near the surface of said semiconductor substrate (3 monolayers or less).
A further object of the present invention is to provide a method of incorporating impurity atoms using substantially mechanical means rather than electrical means or conventional ion implantation.
These and other objects and advantages are obtained in the present invention by employing the use of an atomic force probe to drive-in impurity atoms from a dopant/bandgap source material layer into the surface of an underlying semiconductor substrate. Specifically, the method of the present invention comprises the steps of:
(a) providing a semiconductor substrate having a dopant/bandgap source material layer formed on one surface thereof, said dopant/bandgap source material layer having impurity atoms therein; and
(b) physically contacting the structure provided in step (a) with an atomic force probe under conditions such that the impurity atoms from the dopant/bandgap source material layer are driven into the semiconductor substrate.
In another aspect of the present invention, heterojunction semiconductor structures are provided.
Specifically the heterojunction semiconductor structures of the present invention comprise:
a semiconductor substrate having at least two doped contact regions formed therein (source/drain or emitter/collector), each of said doped contact regions separating internal active device regions from each other, said internal active device regions comprising tapped-in dopant or bandgap layers which are present laterally in the semiconductor substrate; and
external active device regions formed on said semiconductor substrate above said internal active device regions.
It is emphasized that the method of the present invention is employed in forming the tapped-in dopant or bandgap layers. In the case of the dopant layers, the method of the present invention modifies the Fermi level of the junction; whereas when bandgap layers are formed, the method of the present invention alters the valence/conductive bands of the junction without directly modifying the Fermi level.
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Ellis-Monaghan John Joseph
Furukawa Toshiharu
Slinkman James Albert
Louie Wai-Sing
Scully Scott Murphy & Presser
Sebo, Esq. William D.
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