Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate
2003-09-04
2004-09-14
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
C365S173000, C365S158000, C365S168000, C365S210130, C365S209000
Reexamination Certificate
active
06791887
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a reference current generator for a magnetic random access memory, and particularly, to a reference current generator capable of generating a precise and a reliable reference midpoint current signal.
2. Description of the Prior Art
The magnetic random access memory (MRAM) has the advantages of non-volatility, high density, high speed for reading and writing, anti-radiation and so on. When reading the data of the memory, there must be provided a current source or voltage source to be flowed into the selected magnetic tunnel junction (MTJ) for reading the difference of the magneto-resistance value so as to determine the digit value for the data. When writing the data into the memory, the typical method is to use two electrical streamlines (bit line and write word line) to induce the position of the MTJ selected by the biaxial magnetic field so as to change the direction of magnetization of the magnetic tunnel junction and change its data state.
FIG. 1
is a perspective diagram of a prior art magnetic random access memory. The MTJ between the bit line and the write word line is a multi-layered magnetic material with stacked structure. Basically, the structure comprises a soft magnetic layer, a nonmagnetic conductor layer or a tunnel barrier layer, and a hard magnetic layer. By judging the parallel or non-parallel for the direction of magnetization of the two magnetic layers, “1” or “0” state of the memory can be determined. Now in the main structure of the MRAM, the memory cell is composed of 1T and 1MTJ and called as 1T1MTJ structure. The size of the memory cell is about 20 F
2
(F is the characteristic size of the technology node).
FIG. 2
is a perspective diagram of the 1T1MTJ structure of the prior art magnetic random access memory. The plurality of the write word lines
11
and bit lines
13
are mutually perpendicular and crosses, and among them, a plurality of magnetic tunnel junctions
10
and a plurality of transistors
15
are interlaced. Furthermore, the prior art technology provides the structures with different resistance characteristics to be in parallel connection so as to largely reduce the memory bit size.
The magnetic random access memory cell comprises a plurality of magnetic tunnel junctions with magneto-resistance effect, such as giant magneto resistance (GMR) effect or tunneling magneto resistance (TMR) effect for writing in and reading out the data state. In order to judge the logic state of the data memory, there is a need to provide a reference generator for generating a reference signal to be compared with the memory data. As the size of the MTJ reduces, the difference of signals for sensing the memory cell gradually reduces, and since the non-uniformity of manufacturing factors causes the characteristic of the MRAM array MTJ different from each other, there is a possibility that error occurs in the reading of the memory data. Take the 1T2MTJ structure for example, which uses two magnetic tunnel junctions with different resistance characteristics and one transistor, to form the memory reading mechanism with 4-states needs a signal generator capable of providing three reference signals for judging the logical value of the data. Similarly, take the 1T3MTJ structure for example, which uses three magnetic tunnel junctions with different resistance characteristics and one transistor, to form the memory reading mechanism with 8-states needs a signal generator for providing seven reference signals so as to judge the logical value of the data.
FIG. 3A
is a perspective diagram of the selection for the prior art midpoint resistance value, and
FIG. 3B
is a perspective diagram of structure of the prior art midpoint resistance reference cell. The prior art 1T1MTJ structure applies a midpoint resistance reference generator. The midpoint resistance value R
mid
is the equivalent value obtained by mutually connecting the maximum resistance value (R
max
)
10
and the minimum resistance value (R
min
)
10
′ in the memory cell in series and then in parallel. However, because the voltage drops of the MTJ element in the reference cell and in the memory cell are different, the reference signals generated by using this method will be deviated. As the size of the MTJ continuously reduces, the noise margin will shrink so as to cause the data misjudgment. Furthermore, the method for serial/parallel connection requires complicated wiring and mask layout, and when it is applied in the 1T2MTJ structure, especially the 1T3MTJ structure and more, the size of the reference generator will become enormous.
SUMMARY OF THE INVENTION
In order to resolve the drawbacks of the prior art, the present invention applies a simplified reference current generator for a magnetic random access memory to generate a reference midpoint current signal to be compared with the memory data in the magnetic random access memory so as to resolve the misjudgment caused by the non-uniformity between the magnetic tunnel junctions due to the manufacture factors. Furthermore, by connecting more than two sets of reference current generators in parallel, the deviations or faults of the magnetic tunnel junctions in the generator will be corrected so as to provide the more accurate reference signals. The reference generator according to the present invention is positioned in the vicinity of the memory cells of the magnetic random access memory, and applies reference elements which are the same as the magnetic tunnel junctions of the memory cells and bear the same cross voltages. Therefore, the reference signal will not be deviated by the bias dependence effect of the magnetic tunnel junction (MTJ) in the magnetic memory. The plurality reference elements are used for forming the reference current generator by applying one or several bit lines, and the voltage which is the same as the voltage of the memory cell is crossly connected to the reference elements so as to generate a plurality of current signals; and a peripheral IC circuit is used for dividing the plurality of current signals into half the reference signals so as to obtain a plurality of midpoint current reference signals. The midpoint current reference values are provided to the multiple-states memory cells, such as the 2-states, 4-states, and 8-states memory cells, for reading data.
REFERENCES:
patent: 6426907 (2002-07-01), Hoenigschmid
patent: 6512689 (2003-01-01), Naji et al.
patent: 6590804 (2003-07-01), Perner
patent: 6621729 (2003-09-01), Garni et al.
Chen Yung-Hsiang
Hung Chien-Chung
Kao Ming-Jer
Pan Tsung-Ming
Bacon & Thomas PLLC
Industrial Technology Research Institute
Tran Andrew Q.
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