High reliability output buffer for multiple voltage system

Details High reliability output buffer for multiple voltage system High reliability output buffer for multiple voltage system

1996-02-22

1997-07-08

Hudspeth, David R.

Electronic digital logic circuitry

Interface

Supply voltage level shifting

326 21, 326 58, 326121, H03K 190185

Patent

active

056465505

ABSTRACT:
An output buffer (30) is connected to an output signal line and receives an internal power supply voltage, for example 3.3 volts, which is lower than a voltage, for example 5 volts, that other devices which may be connected to the output signal line are able to drive. To protect an output transistor (71) from the harmful effects of the higher voltages on the output signal line, the output buffer (30) includes a special bulk biasing circuit (80). The bulk biasing circuit (80) biases the bulk of the output transistor (71) at an internal power supply voltage when the output buffer is driving and when not driving to a voltage determined by the output signal. To prevent overlap currents, the output buffer (30) includes a special gate biasing circuit (100), which momentarily drives the gate of the output transistor (71) to a voltage equal to the internal power supply voltage when the output buffer (30) stops driving.

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patent: 5546019 (1996-08-01), Liao
patent: 5565794 (1996-10-01), Porter

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