Static information storage and retrieval – Systems using particular element – Magnetic thin film
Reexamination Certificate
2002-06-06
2004-08-17
Nguyen, Van Thu (Department: 2824)
Static information storage and retrieval
Systems using particular element
Magnetic thin film
C365S158000, C365S171000
Reexamination Certificate
active
06778433
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to the general field of magnetic RAMs with particular reference to reducing current requirements for information writing.
BACKGROUND OF THE INVENTION
The principle governing the operation of the memory cells in magnetic RAMs is the change of resistivity of certain materials and film structures in the presence of a magnetic field (magneto-resistance).
The storage element used for the RAM of the present invention is a magnetic tunneling junction (MTJ) device. The MTJ device consists of a pair of soft ferromagnetic (FM) layers with an insulating spacer in between. The magnetization in one of the soft FM is free to rotate, and is called free layer. The magnetization of other FM layer is pinned by an adjacent anti-ferromagnetic (AF) layer and is called a pinned layer. The insulating layer, typically alumina or silica, is about 10 Angstroms thick. A tunneling current flows from one FM layer to another when voltage is applied across the two FM layers.
The principle governing the operation of the MTJ cell in magnetic RAMs is the change of resistivity of the tunnel junction between the two ferromagnetic layers. When the magnetizations of the two ferromagnetic layers are in opposite directions, the tunneling resistance increases, due to a reduction in the tunneling probability. Relative to the state in which the magnetization in the two FM films is in parallel, the difference in resistance is typically 40%. This phenomenon is called the tunnel magneto-resistance effect, or TMR.
In a conventional magnetic RAM, cells are programmed using two programming currents flowing through two orthogonal lines. This is illustrated in
FIG. 1
where programming line
11
and bit line
12
intersect above memory cell
13
. The applied magnetic field is in the longitudinal direction of the cell, due to lines
11
, which is usually the magnetic anisotropy axis, but is below the switching threshold of the cells. Thus, the longitudinal field alone does not switch the cells. The transverse field generated by lines
12
lowers the switching threshold of the longitudinal field so that a cell that lies at the intersection of two orthogonally activated lines can switch, while half-selected cells on the same bit or programming line do not.
The weaknesses of this cell structure are twofold: (1) its flux generation efficiency from the program line is low, requiring a very large program current, in the order of 3-10 mA, to switch the cell and (2) the program field is not confined to the selected cell, all cells on the same program line seeing same magnetic field. This may cause a write disturb problem unless the tolerance of the switching threshold of the cells in the array is under tight control.
A routine search of the prior art was performed with the following references of interest being found:
In U.S. Pat. No. 6,211,090 B1, Durlam et al. show a magnetic memory device with high permeability material on the outside faces of each conductor to focus the flux toward the bit. The damascene structure that is used for the wiring greatly reduces the effectiveness of the flux concentrator layer as far as increasing the field right at the bit. Both U.S. Pat. No. 6,174,737 B1 (Durlan et al.) and U.S. Pat. No. 6,165,803 (Chen et al.) are similar to this and also show the same damascene structure for the wiring.
These patents teach how to make use of the second consideration, namely using high-permeability material to coat the program lines, to the cell structure given in prior art. There is no teaching of how to combine the two considerations to give a more efficient cell structure. This invention does.
In U.S. Pat. No. 6,272,040 B1, Salter et al. show a method for programming a MR memory device while Tran in, U.S. Pat. No. 6,163,477, shows an MRAM device that adds a permanent magnetic bias in addition to the regular switching fields. Zhu et al. describe a multi-layer MTJ memory cell in U.S. Pat. No. 5,978,257 while Tracy et al. (in U.S. Pat. No. 5,902,690) use a magnetic layer to shield the magnetic memory element from stray magnetic fields.
SUMMARY OF THE INVENTION
It has been an object of at least one embodiment of the present invention to provide a memory storage device, such as an MTJ structure, in which the magnetic flux generation efficiency is maximized so that the write current is minimized.
It is another objective of at least one embodiment of the present invention to provide a locally strong magnetic field in the vicinity of the selected memory storage element, such that it causes little interference to the neighboring cells.
These objects have been achieved using two methods. First, the program line is made to be part of the memory cell itself so the program current runs inside the device, instead of externally in a separate program line. This is the most efficient possible location for the program line since it is now only about 10 Angstrom from the free layer.
Since the pinned layer is located over the antiferromagnetic layer, part of the program current will flow through the latter as well (since this layer is generally electrically conducting—PtMn, IrMn or NiMn for example). This effect is, however, minor since the antiferromagnetic layer is relatively thin. If necessary, the program current could be fully confined to the pinned layer by making the antiferromagnetic layer electrically insulating, using NiO for example.
The flux at the free layer can be further increased by surrounding each bit and/or program line with a sheath of high permeability material which covers the full circumference of the wire except for a gap located directly above or below the memory element. This high permeability material reduces the magnetic field generated by the current in the surroundings, thereby increasing its strength at the gap. The high permeability layer may be confined to the immediate vicinity of the memory. The high permeability layer may be a conductor or an insulator, the latter case allowing it to make direct contact with the two ends of the memory stripe. dr
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1
illustrates the structure of a magnetic tunnel junction device of the prior art.
FIG. 2
a
shows the magnitude of a magnetic field as a function of distance from the center of a circular current carrying conductor.
FIG. 2
b
shows the effect of adding a high-permeability material coating on part of the conductor.
FIG. 3
shows the essential elements of the present invention.
FIGS. 4
a
-
4
d
are isometric representations of four embodiments of the present invention.
REFERENCES:
patent: 5902690 (1999-05-01), Tracy et al.
patent: 5978257 (1999-11-01), Zhu et al.
patent: 6163477 (2000-12-01), Tran
patent: 6165803 (2000-12-01), Chen et al.
patent: 6174737 (2001-01-01), Durlam et al.
patent: 6211090 (2001-04-01), Durlam et al.
patent: 6269018 (2001-07-01), Monsma et al.
patent: 6272040 (2001-08-01), Salter et al.
patent: 6556473 (2003-04-01), Saito et al.
patent: 6606263 (2003-08-01), Tang
patent: 6642595 (2003-11-01), Hung et al.
patent: 6711053 (2004-03-01), Tang
Nguyen Hien
Nguyen Van Thu
Taiwan Semiconductor Manufacturing Company
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