High power field effect transistor

Details High power field effect transistor High power field effect transistor

1992-12-14

1995-01-17

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257502, 257333, 257487, H01L 27085, H01L 27088, H01L 27105

Patent

active

053828216

ABSTRACT:
There is disclosed an FET having a high drain breakdown voltage and a short gate length comprising an active layer 2 formed on a surface layer of a semiconductor substrate 1; a highly doped impurity source region 4 and highly doped impurity drain region 4 formed in the surface layer of the semiconductor substrate 1 to sandwich the active layer 2; an insulation film 5 formed on the highly doped impurity source region 4; a gate electrode 8 formed on the active layer 2 and the insulation film 5 while maintaining a constant distance 1.sub.GD from the highly doped impurity drain region 4; and a source electrode 6 and a drain electrode 7 formed on the highly doped impurity source region 4 and the highly doped impurity drain region 4, respectively.

REFERENCES:
patent: 4742380 (1988-05-01), Chang et al.
patent: 4928155 (1990-05-01), Nakagawa et al.
patent: 5001536 (1991-03-01), Fukuzawa et al.
patent: 5124770 (1992-06-01), Umemoto et al.
patent: 5132753 (1992-07-01), Chang et al.
patent: 5191401 (1993-03-01), Shirai et al.
Geissberger et al., "New Refractory Self-Aligned Gate Technology for GaAs Power FET's and MMIC's", IEEE Electron Devices, vol. 35, No. 5, May 1988.

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