Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement
Reexamination Certificate
2001-08-15
2002-07-30
Lee, Benny (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including particular biasing arrangement
C330S261000
Reexamination Certificate
active
06426678
ABSTRACT:
BACKGROUND
1. Technical Field
The present invention relates to an amplifier, and more particularly, to a high power amplifier system employed in, e.g., a transmitting portion of a code division multiple access (CDMA) terminal, which provides high dynamic range and minimizes power consumption.
2. Description of Related Art
Code division multiple access (CDMA) is a method for providing multiple-access within the same frequency using spread spectrum technology. Most CDMA functions are embodied in hardware and software in a modem chip and every radio frequency (RF) circuit comprises a plurality of monolithic microwave integrated circuit (MMIC) chips. Each of the MMIC chips is a high-frequency integrated circuit that is manufactured by forming passive devices such as resistors, inductors and capacitors, as well as active devices such as transistors and a field effect transistors (FET), on one semiconductor substrate. MMIC chips can perform a variety of functions such as signal amplification and frequency conversion.
Prior to transmission of a signal from a terminal to a base station, the signal is preferably passed through an RF filter and then amplified to an appropriate level. Signal amplification is typically performed using a variable gain amplifier (VGA).
FIG. 1
is a circuit diagram of a conventional variable gain amplifier. The variable gain amplifier comprises three transistors NPN
1
, NPN
2
and NPN
3
and two impedance components Z
L
and Z
e
. The transistor NPN
3
has a base that receives an alternating current (AC) input signal Vin that varies about a fixed direct current (DC) bias voltage Vs. Control voltages having a potential difference &Dgr;V are input to the bases of transistors NPN
1
and NPN
2
to control the gain of the variable gain amplifier. The two impedance components Z
L
and Z
e
are employed for controlling the gain of the variable gain amplifier. The voltage gain A
V
of an output signal V
O
with respect to the input signal Vin of the circuit can be expressed by formula (1):
A
V
=
V
O
Vin
≅
g
m
Z
L
1
+
g
m
Z
e
×
1
1
+
e
-
Δ
V
V
T
(
1
)
where
g
m
=
I
ee
V
T
.
Referring to formula (1) and
FIG. 1
, in the conventional variable gain amplifier, the bias current I
ee
is fixed to a particular level by the DC bias voltage V
S
, and thus, the gain A
V
is controlled by adjustment of the potential difference &Dgr;V between the two control voltages.
A circuit that is used in a CDMA RF transmitting portion must have sufficient linearity to satisfy recommendations on adjacent channel power ratio (ACPR). ACPR indicates a ratio of the maximum value of signal power transmitted from an assigned frequency band, that is, a corresponding channel, with respect to power in a different channel affected by the signal power. Particularly, as the power of the transmitted signal becomes closer to the maximum permissible power value, it becomes increasingly difficult to satisfy the recommendations. Indeed, if output power reaches almost the maximum power value, the power of a signal affecting a peripheral frequency band increases more significantly than the power of the transmitted signal, and thus, the ACPR value decreases.
To solve this problem, a large amount of bias current should be supplied. On the other hand, in a case where the electric power of the transmitted signal is low, the ACPR value increases, so that the ACPR recommendations can be sufficiently satisfied.
One requirement of the ACPR recommendations, however, is for a transmitted signal to have a particular power value irrespective of the electric power of the transmitted signal. Thus, in the prior art, a considerable amount of bias current I
ee
should continually be supplied to the amplification circuit in order to satisfy the ACPR recommendations. Consequently, the conventional amplification scheme provides a disadvantage in terms of electric power consumption.
SUMMARY OF THE INVENTION
To solve the above problems, it is an object of the present invention to provide a high power amplification system which has a sufficient dynamic range to satisfy ACPR recommendations and is capable of minimizing power consumption.
Accordingly, to achieve the above object, there is provided a high power amplifier system including a voltage-to-current converter which outputs current in proportion to the difference voltage between a reference voltage and a first control voltage for controlling gain; a difference voltage generator which outputs a second control voltage and a third control voltage in response to the output current of the voltage-to-current converter, wherein the difference between the second control voltage and third control voltage is the same as the difference between the reference voltage and the first control voltage; a bias control circuit which outputs bias control current through an output terminal in response to the output current of the voltage-to-current converter and at least one control signal; a resistance component having one end to which the output current of the bias control circuit is applied and the other end which is connected to an input terminal; and an amplification circuit amplifying the input signal which is received through the input terminal and varies about the output current of the bias control circuit applied through the resistance component in response to the second and third control voltages. The bias control circuit magnifies the amount of current flowing in the amplification circuit in a case where the first control voltage, that is, the gain of the amplification circuit, has a high voltage value within a predetermined voltage range, reduces the amount of current flowing in the amplification circuit in a case where the first control voltage, that is, the gain of the amplification circuit, is low and controls the bias control current in order to make a particular amount of current flow in a case where the first control voltage is over the predetermined voltage range. Therefore, the bias control circuit makes the bias control current maintain superior linearity within a predetermined voltage range of the first control voltage. In addition, in a case the first control voltage is over the predetermined voltage range, the bias control circuit controls the bias control current so that a particular amount of current can flow in the amplification circuit, and thus the current flowing in the amplification circuit can be minimized.
In another aspect of the present invention, the bias control circuit comprises a maximum/minimum current selection circuit which receives at least one control signal, selects the maximum current and the minimum current, outputs the selected maximum current and introduces the difference current between the maximum current and the minimum current; a first difference current generating circuit which supplies the difference current between the maximum and minimum currents to the maximum/minimum current selection circuit, and mirrors and outputs the supplied difference current; a Fermi-Dirac function generating circuit which generates current which is in proportion to the Fermi-Dirac function in response to the output current of the first difference current generating circuit and the output current of the voltage-to-current converter; and a second difference current generating circuit which generates and outputs the difference current between the output current of the Fermi-Dirac function generating circuit and the maximum current.
In yet another aspect of the present invention, the maximum/minimum current selection circuit comprises a plurality of maximum current sources which supplies the maximum currents, each of the maximum currents having a different size; a plurality of minimum current sources which supplies the minimum currents, each of the minimum currents having a different size; a first switch which selects one from among the plurality of the maximum current sources in response to a control signal; a second switch which selects one from among the plurality of the minimum current sources in response to t
Choe Henry
F. Chau & Associates LLP
Lee Benny
Samsung Electronics Co,. Ltd.
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