High performance stress-enhance MOSFET and method of...

Details High performance stress-enhance MOSFET and method of... High performance stress-enhance MOSFET and method of...

2006-04-28

2009-11-10

Mandala, Victor (Department: 2826)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

C438S938000, C257S213000, C257SE21615

Reexamination Certificate

active

07615418

ABSTRACT:
A semiconductor structure and method of manufacturing and more particularly a CMOS device with a stress inducing material embedded in both gates and also in the source/drain region of the PFET. The PFET region and the NFET region having a different sized gate to vary the device performance of the NFET and the PFET.

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