High-performance semiconductor package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package

Reexamination Certificate

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C257S781000

Reexamination Certificate

active

07468550

ABSTRACT:
A high-speed and high-performance semiconductor package reduces degradation of chip characteristics when chips are packaged. The semiconductor package includes a semiconductor chip including a plurality of bonding pads, a redistribution layer formed on the semiconductor chip while being connected with the bonding pads, a substrate attached to an upper surface of the semiconductor chip and formed with a window for exposing the redistribution layer, a connection member for electrically connecting the bonding pad of the semiconductor chip with the substrate, a sealing member for sealing the window including the connection member and a surface of the substrate including the semiconductor chip, solder balls attached to the substrate.

REFERENCES:
patent: 6642627 (2003-11-01), Song et al.
patent: 6841884 (2005-01-01), Shizuno
patent: 7005752 (2006-02-01), Bojkov et al.
patent: 2007/0262436 (2007-11-01), Kweon et al.
patent: 11017048 (1999-01-01), None
patent: 1020017014252 (2001-11-01), None
patent: 10200300006915 (2003-01-01), None
patent: 10-0532726 (2004-08-01), None
patent: 10-2005-001459 (2005-01-01), None
Korean Patent Gazette from Korean Patent Office, May 7, 2007.

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